Which interrupt is not level-sensitive in 8085?
RST 7.5 is a raising edge-triggering interrupt. Read more »
RST 7.5 is a raising edge-triggering interrupt. Read more »
RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7. Read more »
Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag. Read more »
Stack pointer and Program counter all have 16 bits. Read more »
Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the address of the top of the stack. Read more »
The Micro Processor enters into Halt-State and the buses are tri-stated. Read more »
The Quality factor is also defined, as Q. So it is a number, which reflects the lossness of a circuit. Higher the Q, the lower are the losses. Read more »
There are 12 interrupts in 8085. Read more »
Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open... Read more »
TRAP has the highest priority Read more »
TRAP, RST7.5, RST6.5, RST5.5, INTR Read more »
Yes, it can be used, if an accurate clock frequency is not required. Also, the component cost is low compared to LC or Crystal Read more »